7492

• Supply voltage (VCC):75 V – 5.25 V (typical 5 V)
• Input logic high (VIH): ≥ 2 V
• Input logic low (VIL): ≤ 0.8 V
• Output logic high (VOH): ≥ 2.4 V
• Output logic low (VOL): ≤ 0.4 V
• Output current:
  • High: −0.4 mA
  • Low: 8 mA
• Power dissipation: ~50 mW typical
• Operating temperature: 0 °C – 70 °C

Timing Characteristics

• Maximum clock frequency (fmax): ~25 MHz (typical TTL)
• Propagation delay: ~15–35 ns per stage

Functional

• 4-stage ripple counter
• Can be configured for:
  • Divide-by-2 using first flip-flop (Q0)
  • Divide-by-3 using second and third flip-flops
  • Divide-by-12 using Q0–Q3 outputs
• Asynchronous master reset (MR) clears all outputs

• Can cascade multiple ICs for higher division ratios

Applications

• Digital clocks and timers
• Frequency division (by 2, 3, 12, etc.)
• Event counting
• Sequential logic circuits
• Pulse generation